Steven Philley
Electronics Z80 Circuits Site contents

Vol. IV — Electronics · Computer history

Zilog Z80

Hub · Featured homebrew · Curated directory · Sep 2026

Federico Faggin’s Zilog Z80 (1976) extended the Intel 8080 with more registers, a richer instruction set, and a friendlier bus — then rode the home-computer and CP/M waves for decades. Spectrums, TRS-80s, MSX, Game Boys, arcade boards, and industrial controllers kept it alive; today a lively homebrew scene still boots CP/M from SD cards and teaches kids how an 8-bit bus feels. This desk collects two featured modern builds and a large directory of docs, OS archives, SBCs, and tools — link-outs only, no copyrighted manuals pasted wholesale.

Why the Z80 still matters

CP/M made the Z80 the business CPU of the late seventies: editors, compilers, and bulletin-board culture ran on banked 64 KB machines with floppy “drives.” Home micros (ZX Spectrum, Amstrad CPC, MSX, TRS-80, Sharp MZ, many others) made assembly and BASIC a living room skill. Soft cores, CPLD glue, and cheap flash keep the same instruction set reachable with a soldering iron and a serial terminal.

For computer-history and electronics desks, the Z80 is a sweet spot: complex enough to teach paging, interrupts, and peripherals; simple enough that a through-hole SBC still fits a 100×100 mm board.

Grab everything — curated directory

Scannable links with one-line blurbs. Prefer working URLs; a few classic hosts are HTTP-only or historically flaky — marked where known.

Core docs & portals

CP/M & software archives

Homebrew SBCs & modular systems

Assemblers, C toolchains & editors

Emulators & CPU cores

Machines, culture & related platforms

Opcode overview (link-out)

The Z80 is an 8080-compatible core plus IX/IY, alternate register set, block moves, and bit ops. Do not paste copyrighted manuals here — use the free tables and vendor PDFs above.

Main map

Single-byte opcodes cover 8080-style loads, ALU, jumps, calls, and restarts. Undocumented shifts (SLL) and combinations exist; emulators disagree on edge cases — prefer tested cores.

Prefixes

CB bit/rotate on registers or (HL). ED block transfer, I/O, and extras. DD/FD select IX/IY. Double prefixes (DDCB / FDCB) index bit ops with a displacement.

Timing

Count T-states (clock ticks) and M-cycles. DRAM refresh steals cycles on M1. Homebrew clocks often 4–10 MHz; peripherals (SIO/CTC) want clean mode-2 interrupt daisy chains.

Educational link desk — not a substitute for datasheets, license terms, or the projects’ own READMEs. CP/M redistribution follows the clarified Digital Research terms collected on cpm.z80.de; always check the source you download. Outbound sites change; if a link 404s, start from z80.info or the project’s org page.